The present invention relates to a level shifter. More specifically, the present invention relates to a multi-level level shifter circuit having a single ended input.
Many integrated circuits or IC applications require translating one or more signals from one voltage level to another. Such circuits that perform this function are more commonly known as “level shifters”. A typical level shifter requires both an input signal and its complement to drive it. If the complement of the input signal isn't provided, it may be generated using an inverter referenced to the input signal level; however, generating the compliment of the input signal may not be practical if the inverter power supply isn't readily available.
Other known level shifter circuits require only a single-ended-input; however, such level shifters may draw DC current during operation thereon (when the input is high for example). This DC power dissipation may not be acceptable in certain applications.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with the present invention as set forth in the remainder of the present application with reference to the drawings.